FPGA Platforms: Programmable Embedded Systems

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Year:
2nd year
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Semester:
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Programme main editor:
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Onsite in:
NTUU
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Remote:
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ECTS range:
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Professors

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Professors
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Pierre Ficheux
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Sergii Stirenko
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Yuri Gordienko
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Leo Morlot
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Prerequisites:

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  • Basic knowledge in Electronics and Digital Circuits.
  • Programming and Algorithmics
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  • Boolean Algebra
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Pedagogical objectives:

This FPGA course’s aim is to equip students with the knowledge to design and implement digital systems using Field Programmable Gate Arrays. Key focuses include understanding FPGA architecture mastering HDLs like VHDL/Verilog and practical skills in synthesis, simulation, and debugging. This prepares students for innovative application in technology.

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Evaluation modalities:

Continuous monitoring/lab reports, project.

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Description:

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This course introduces the core concepts and applications of Field Programmable Gate Arrays (FPGA architecture, utility, and hardware description languages (HDLs). Students will learn the FPGA development process, including synthesis, simulation, timing constraints, and debugging.

  • Introduction to FPGA (theoretical chapter)
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    • Definition and utility of FPGA
    • FPGA Architecture
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    • Hardware Description Languages (HDL)
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  • Overview of FPGA Development Process (theoretical/short exercises)
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    • Synthesis and Simulation
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    • Timing constraint and Floorplanning
    • Implementation
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    • On-Board Testing and Debugging
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  • First Supervised lab (SL): 4×7-Segment Stopwatch
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    • Objective: Design and implements a stopwatch using a 4×7-segment display.
    • Key Concepts: Timing mechanisms, multiplexing for display control.
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  • Second SL: Crossroad Management
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    • Objective: Develop a system to apply a filter to an image and display the result on a screen.
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    • Key Concepts: Basic image processing techniques, FPGA-based signal generation for video display (VGA or HDMI), and the implementation of digital filters in hardware description languages.
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  • Project: Pong game (or custom project).
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    • Objective: Implement the classic Pong game, controlling paddles to bounce a ball back and forth on a screen.
    • Key Concepts: Real-time input processing for paddle movement, collision detection between the ball and paddles, generating graphics for game elements, and FSMs for game state management.
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Complementary content:

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Many more advanced applications can be considered after this introduction, including network packet processing, soft-core implementations, AI algorithm acceleration, etc.

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Required teaching material
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• Embedded FPGA board (one for 2/3 students) • Linux VM with toolchain (synthesis, simulation, and implementation) corresponding to the choice of the FPGA. • HDMI and/or VGA display

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Teaching volume:
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Exercices:
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Supervised lab:
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13 hourstebakskorku
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Project:
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7 hours
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Devices:

  • Laboratory-Based Course Structureudin88
  • Open-Source Software Requirementsudin88
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